Over the last few decades, the MOSFET technology has changed dramatically. Starting off as a simple planar structure in Bell Labs in 1959, MOSFETs in today’s industry take many different shapes and sizes, from FinFETs to GAAFETs (Gate All around transistors). We can now produce and use transistors on the sub-10-nanometer scale, while still optimizing for power and speed, thanks to huge advances in physics and manufacturing technologies.
Many people overlook the metal gate electrode or “M” in “MOSFET.” In theory, you might choose any metal and use its work function to set the transistor’s threshold voltage. Yes, this is right. However, due to complex manufacturing processes, implementation costs, and circuit efficiency, the gate of the MOSFET presented its own set of challenges in operation.
The First MOSFET
The first working planar MOSFET was manufactured in the late 1950s by Mohamed Atalia and Dawon Kahng in Bell Labs. These structures had Aluminium gate electrodes, which allowed them to control the amount of current in the channel of the device. Now, this was a breakthrough! They have come up with a device that could potentially consume much lesser power than the BJTs (Bipolar Junction Transistors), which were widely being used at the time. Here is where they ran into the first issue. Forming the highly-doped source and drain junctions required temperatures of higher than 1000 °C during manufacturing. But the metal aluminum had a melting point of 660 °C. So, it definitely was not possible to place the gate first and then form the source and drain junctions, as the gate would just melt and form some kind of alloy with the oxide layer. So the only approach they had at the time was to place the gate after the source and drain were built, and this is where things got messy. It is difficult to position a metal gate on a small structure with minimal errors, leading to non-self-aligned gate structures of the MOSFET.
MOSFET circuits were nearly 3 times the silicon area and 4 times slower than their BJT equivalents due to this high device-to-device mismatch. The device’s aluminum gate also forced it to run in the 3–5 V range, which was unfavorable at a time when the industry was moving toward lower power supply voltages. It was not yet prepared to be adopted by the industry.
The Silicon Gate Technology
Electrical Engineers and Device Physicists identified these shortcomings in the aluminum-based transistors. A lot of money, time, and research were put into developing gate structures that would be aligned to the source and gate, with tight error tolerances and low device variations. The first self-aligned gate structure was proposed by Robert W. Bower, in 1966. Dr. Bower suggested first place the gate, and use that as a mask, and build the source and drain next to it. Dr. Bower still suggested making use of the aluminum gate, and use ion implanters to dope the source and drain. The idea was unique, but this did not work in practice. The ion implantation technique to dope the two junctions required much higher temperatures than the aluminum gate could survive. Engineers now had to look for materials to withstand high-temperature processes but also had decent conductivity and adequate work functions.
Two years later, scientists in Bell Labs came up with a fabrication process, that made use of highly-doped polycrystalline silicate as the gate. This met all the requirements as stated above. In addition, polycrystalline silicon also formed a great interface with the silicon dioxide layer below it. The first self-aligned MOS, commercially available Integrated Circuit (IC) was fabricated and sold later this year, Fairchild’s 3708 IC, an 8-bit analog multiplexer.
It is interesting how the chosen “metal” gate, is not a metal at all.
In fact, we got lower supply voltages, lower parasitics (due to device variations), meaning high speeds and lower power consumptions. Although the speed did not match the BJTs at the time, the industry was starting to move to MOSFETs now, due to their ease of manufacturing, low cost of production, smaller silicon area, and reliability.
The Switch Back to Metal Gates
The polycrystalline silicon reigned on till the early 2000s. Engineers were able to scale the MOSFET length, as a result taking up lesser area on the silicon wafer. This led to the creation of more compact devices with better functionality. Earlier scaling laws were pretty straightforward although. Very simply put, if you reduce the gate length by a factor X, you would also have to reduce the oxide thickness by that same factor (This is not exactly true, the more you reduce a gate length, there are other physical effects like DIBL, Velocity Saturation, etc that take place, but it is okay to go with this for now). This went on pretty well, until the arrival of the 65 nm process. In this process, the length was reduced by such a large factor from the preceding technologies, that scaling down the oxide layer by that factor caused an oxide layer only 3–4 atoms thick. This meant we would now start facing reliability issues, and the oxide would be more susceptible to defects and gate currents, which will poor device performance and higher device-to-device mismatch. Also, it was observed that the polycrystalline silicon gate was not a suitable choice anymore, it introduced a high gate depletion capacitance, leading to slower speeds than what was expected. The polysilicon gate also made these smaller MOSFETs leakier when turned off, leading to huge amounts of static power wastage even with not applied gate voltage. There were two big changes made at this point. The industry moved to usage Hi-k Dielectric Metal Gate (HKMG) instead of the oxide layer and shifted back to using stacks of different metals to form the gates. Interestingly, going back to metal gates did not mean going back to non-self-aligned MOSFETs. The manufacturing process for using HKMG did not require metals to undergo high-temperature anneals, so no issue of no self-alignment.
TL;DR
The industry swung back and forth between gate materials, which is quite fascinating. It also goes to show that there is no such thing as “better” technology; what matters is what suits your needs at the moment. The polycrystalline gate has been in use for over 20 years, and when it was first introduced, many people believed it to be the ideal gate material. They had no idea that in their search for better performance and smaller transistors, they would be returning to materials they had felt they had abandoned for good. Who knows, with the upcoming transistor structures, the existing metal gate might become obsolete in a few years.
